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The highest performance, expandable, directly attached storage can be achieved at low cost by moving the server or work station's PCI bus "outside" and taking advantage of the benefits of the architecture when adding storage subsystems as needed. This is the basis of JMR's U.S. Patent on a "Large Array of Mass Data Storage Devices Connected to a Computer by a Serial Link".

To make use of high performance, high capacity, low cost SAS and SATA disk drives for mass storage, a bridging interface is required from PCI Express (PCIe) to SAS. Conventionally, that host bus adapter or RAID controller would be installed in the host computing system and the storage array would be connected using multilane (x4) SAS cables, thus limiting the bus transfer bandwidth to 4 x 3Gb/s = 12Gb/s irrespective of the quantity of storage devices used.

This is very restrictive, since current generation PCIe bus bandwidth is 2.5Gb/s per lane, and all modern small computers provide at least x8 (8-lane) PCIe expansion slots, which can provide a simplex operating bandwidth of 20Gb/s, 1.67x the bandwidth available from a 4-lane SAS connection. However, this is the tip of the iceberg: Many modern computers provide x16 PCIe and hardware is transitioning from First Generation PCI Express ("Gen. 1") to Second Generation PCI Express ("Gen. 2"), creating wider and wider expansion pipelines (http://www.pcisig.com/specifications/pciexpress/). Gen. 1 x16 PCIe is capable of transfers at 40Gb/s, and Gen. 2 x16 PCIe doubles that again, to 80Gb/s. Other expansion technologies aren't keeping up with this aggressive pace, as will be discussed shortly.